Equipping AI with Memory Anchors: the open‑source EdgeRock‑4B core matrix hits original‑model throughput on a single GPU…
Equip AI with Memory Rock Anchor: Rock Core Matrix Open‑Source EdgeRock‑4B, Single‑Card Throughput Matches the Original Model…
Summary
不给缓存瘦身，而是让它根本不增长。作者｜田思奇编辑｜栗子AI推理的成本账，正在被越来越长的任务改写。麦肯锡预计，到2030年，推理将占AI算力需求的一半以上。K
不给缓存瘦身，而是让它根本不增长。
作者｜田思奇
编辑｜栗子
AI推理的成本账，正在被越来越长的任务改写。
麦肯锡预计，到2030年，推理将占AI算力需求的一半以上。KV Cache是这笔账里绕不开的一项，行业也一直在想办法：上个月，SGLang就联合千问、英伟达推出了4-bit KV Cache方案，让同样的显存装下更长的上下文。
Coding Agent让这笔账变得更紧迫。一项复杂的编程任务，模型要反复读代码、调工具、改程序，再根据测试结果接着干。任务跑得越久，要记住的历史就越多，KV Cache随之膨胀，不仅挤占显存，也压低了一张卡能同时服务的请求数。
可无论怎么压缩，缓存仍会随推理增长，只是长得慢一些；Mamba、RWKV这类固定内存的模型，又容易丢掉解题要用的关键细节。岩芯矩阵换了一个思路：不给缓存瘦身，而是让它根本不增长；同时，让模型自己学会哪些细节值得记住。
本周，岩山科技旗下岩芯矩阵联合香港科技大学、卡内基梅隆大学等高校，发布并开源EdgeRock-4B。该模型由Qwen3.5-4B转换而来，核心是团队提出的记忆岩锚（Rock Memory Anchors，RMA）：就像攀岩者钉下岩锚一样，把推理途中的关键信息牢牢固定下来。
根据团队公布的测试，EdgeRock-4B每条序列的注意力KV固定在72 MiB，在256K上下文下比来源模型少99.1%。与此同时，它在同一张GPU上的长推理吞吐达到来源模型的6.42倍，AIME 2024–2026平均一次通过率也有82.9%，与内存随推理增长的领先小模型处于同一水平。
内存省下来了，推理没有打折，吞吐还翻了几倍。这三件事同时成立，正是EdgeRock想要证明的。
1.长推理时代，AI重新算内存账
长上下文吃显存，大头在推理过程中不断累积的KV Cache。模型每生成一个新token，都要保留此前每个token的键和值，供后面的计算继续使用。
以Qwen3.5-4B为例，按公开配置计算，每多一个token，注意力KV就要多占约32 KiB。上下文到64K时，一条序列约2 GiB；到256K时，就是8 GiB。这还没有算上模型权重和其他运行开销。
EdgeRock的KV Cache不随上下文增长，在256K上下文处比来源模型少99.1%
放到一张80GB显卡上，这笔账就更直观了。推理服务靠批处理把GPU用满，可每条请求的缓存越大，能同时装下的请求就越少。很多时候，计算还有余量，显存却先见了底，单位时间产出的token也就上不去。
岩芯矩阵团队负责人徐骅在接受「甲子光年」采访时提到，业界已有不少压缩方案，比如多头潜在注意力（MLA）和KV Cache量化。它们降低了每个token的存储开销，但缓存仍会随着上下文增长。放慢增长，只是把内存墙往后推。
另一条路是改架构。Mamba、RWKV等循环模型把历史写进固定规模的状态，内存不再增长，可早期的细节很容易在更新中被冲淡，多步推导的数学题、反复调用早期代码的编程任务都会因此受影响。岩芯矩阵评测过16个这类有界状态模型，最大到14B，AIME 2024–2026的最好成绩也只有18.8%。
也就是说，固定内存并不难，难的是固定之后还记得住。
岩芯矩阵此前已在这一方向积累了相关研究，并于2026年7月启动针对Qwen3.5-4B的改造实验。据徐骅介绍，选择Qwen，与团队想验证的问题有关：Qwen3.5-4B本身是混合架构，语言、视觉和推理能力都很强，团队希望保留这些能力，只改变模型处理长期记忆的方式。
他和团队想证明的是，一款已经训练成熟的模型，也能通过架构转换获得固定内存，而且推理能力不打折。如果这条路能迁移到其他主流开源模型，固定记忆的适用范围就会大大拓宽。
2.从循环状态到主动记忆，
EdgeRock改造了什么
EdgeRock的改造，集中在历史信息怎么存、怎么读上。为此，团队提出了世界状态（World-State）：模型不再保存一份越写越长的完整历史，而是维护一份容量固定的状态，并随着新信息的到来不断更新。
具体来说，世界状态把历史分成三部分：递推状态抓大意，局部窗口管眼前，锚点库记关键。前两部分沿用业界成熟的Gated DeltaNet和滑动窗口注意力；真正决定模型记住什么的，是RMA。
EdgeRock的固定记忆：递推状态概括上下文，局部窗口保留近期内容，RMA锚点库留住关键细节
RMA的关键，是让模型主动挑选值得留下的信息。徐骅向「甲子光年」介绍，团队通过训练建立了一套评分机制，判断哪些内容对后续的预测和解题更有用。新输入会生成候选记录，再和已有的记忆竞争有限的位置：模型每处理256个token取舍一次，每个KV组只留下得分最高的1024条。
留下的锚点保持写入时的样子，不会随着循环状态的更新被一遍遍重新概括。即使原文早已滑出局部窗口，模型仍能根据当前的问题直接读到它。每条锚点还标着来源位置，模型记住了什么，也可以直接查看。
以机器人巡检为例。机器人沿着路线移动时，摄像头会持续采集大量重复的画面，但某台设备出现过的异常、后来是否已经解除，会直接影响接下来的判断。RMA要做的，就是把这类有长期价值的记录留下来，不让它们在不断的更新中被稀释。
这份记忆能力，也直接撑起了推理能力。团队做过一个干脆的验证：推理时把RMA全部关掉，长上下文上的远距离查询正确率会从94.1%跌到0.4%。
评测显示，在固定内存的约束下，EdgeRock-4B依然保有很强的复杂推理能力。在数学推理、综合知识、科学推理和代码生成四项测试中，它都明显领先参数大得多的固定记忆模型。
EdgeRock仅用4B参数，四项能力得分均领先7B至14B的更大固定记忆模型
省下来的内存，直接变成了服务能力。一张卡同时跑512条长推理（每条32K输入、32K输出）时，EdgeRock-4B连同模型权重在内，显存峰值约61GiB；同样跑这512条序列，来源模型光是KV Cache就要约1 TiB，相当于13张80GB显卡。
512条长推理同时跑：来源模型光KV Cache就要约13张80GB显卡，EdgeRock-4B连权重在内一张卡就够
一张卡装得下更多请求，吞吐自然就上去了。在同一张GPU上，EdgeRock-4B的长推理吞吐达到每秒12124个token，是来源模型的6.42倍。同样的GPU租用时间里，吞吐翻了几倍，每个token的成本也就降到原来的几分之一。单个请求的解码速度，也是来源模型的1.54倍。
同一张GPU 上，EdgeRock-4B的长推理吞吐是来源模型的6.42倍（32K输入、32K输出，单位token/s）
徐骅表示，4B版本的核心价值，在于验证了成熟的大模型可以通过架构改造获得固定内存，同时保住原有的长程推理能力。接下来，团队会在真实的智能体和软件工程场景中，继续打磨这些能力。
从独立的记忆锚点，到更强的复杂推理，再到成倍提升的单卡吞吐，EdgeRock这次开源展示的，是同一套架构带来的连锁效果。对需要持续运行大量长任务的AI服务来说，同样的GPU可以承载更多长推理，服务效率的天花板被抬高了。
3.数据中心推理降本，
下一步瞄准Model on Chip
在徐骅看来，固定内存技术最先兑现商业价值的地方，会是数据中心。
他把两类场景的核心诉求概括为：端侧看重可行性，是“能不能跑通”的刚需；数据中心看重经济性，是“成本是否可控、能否实现盈利”的刚需。
在机器狗巡检、校园配送这样的具身场景里，模型要持续接收环境信息并实时决策，而端侧的算力和内存本就紧张，摄像头采集、运动控制等模块还会进一步挤占资源。固定内存给历史状态划定了上限，让这类设备可以稳定、持续地推理下去。
而在数据中心，推理需求的规模更大，降本的压力也更加突出。对提供token服务的厂商来说，一张卡能承载多少长任务，直接决定了现有算力能产出多少价值。
徐骅判断，大模型研发正在进入更看重投入产出比的阶段。今天，行业竞争仍聚焦于冲击极限性能；而当商业化算账成为主线，固定记忆的价值就会凸显出来。
这也是团队要向更大模型拓展的原因。4B版本已经验证了这条架构改造路线可行；为了支撑更复杂的真实业务，团队还会在27B等更大规模的模型上持续调优，尽量保留原生模型的能力和运行稳定性。
在岩芯矩阵看来，固定记忆的价值并不止于省钱：省下来的内存，在GPU上变成吞吐，在芯片上还能变成速度。
固定记忆的两类收益：GPU 上提高吞吐、降低成本；专用芯片上缩短数据路径、加快生成
所以更远的规划，是沿着固定记忆一路走向“快”。岩芯矩阵把这个目标称为Ultra-Fast Token：让强模型以单用户每秒百万token的速度持续生成。
这条路线分三步走。第一步是EdgeRock，让KV Cache不再增长。第二步是DiffusionRock，把固定记忆带到自回归之外的生成架构，一次写一整块。第三步则是Model on Chip，也就是SiliconRock。
三步走向Ultra-Fast Token，每一步拆掉一道墙
第二步已经有了进展。今天主流的大模型都是一个token接一个token地写，每写一个，都要把权重从显存里读一遍。DiffusionRock换了一种写法：先一次写出256个token的草稿，再用几轮集中修改，每读一遍权重，256个位置一起更新。
据团队介绍，DiffusionRock的单请求速度已达每秒1500 token，比今天常见的每秒一两百token快了一个数量级；它同样用记忆岩锚管理历史，内存不会增长。
同样走三轮，EdgeRock只写出3个token，DiffusionRock已经写完一整块256个token
Model on Chip则代表一套更深层的软硬件协同思路。徐骅介绍，片上SRAM的容量始终是硬件设计的硬约束；而一旦模型运行所需的历史状态稳定在固定规模，专用芯片的设计就有了明确的存储预算。
背后的账是这样的：在GPU上，每生成一个token，都要把整个模型的权重从显存里读一遍。以一个约21亿参数的模型为例，即使权重压到4位，每个token也要搬约913 MB；要做到每秒一百万token，就需要每秒913 TB的带宽。而英伟达最新一代的Rubin GPU，显存每秒也只能读约22 TB，单从理论上算就慢了四十多倍。
换句话说，只要权重还要搬，百万token/s就无从谈起。可只把权重固化进芯片也不够：Taalas等公司已经这样做了，但KV Cache仍随上下文增长，上下文越长，需要的片上SRAM就越多。反过来，只改模型、不改芯片，权重又仍然要搬。两头一起改，两项搬运才会同时消失。
只改一边只能去掉一半，两头一起改，两项搬运才同时消失
SiliconRock正是这样做的：把定型模型的权重直接做成电路，生成时一个字节也不用搬；世界状态的大小固定，可以整个放进片上SRAM，就在计算单元旁边读写。这样一来，主路径上不再需要昂贵的HBM，每个token更便宜；整条生成路径在一块芯片里就能走完，也更快。每秒百万token，意味着每个token只有1微秒，在1 GHz时钟下就是1000个周期；团队按这本账排出的时间表是884个周期，折合每秒约113万token。
一个token在1微秒内走完全程：权重就在电路里，状态就在计算单元旁边
徐骅给出的长期目标，正是把模型能力固化进芯片，最终实现每秒百万token级的生成速度。按照岩芯矩阵的设想，到那时，速度会打开全新的场景：大模型生成得足够快，就能跟上机器人的控制频率，直接控制机器人，“大脑”和“小脑”合二为一。
大脑和小脑合二为一：同一个大模型理解任务、生成动作，并根据执行反馈持续修正
「甲子光年」认为，随着模型能力与推理成本之间的权衡日益突出，固定记忆的价值将进一步显现。对EdgeRock团队来说，接下来的关键，是把这套机制平滑迁移到更大参数的模型上，并在多元硬件环境和真实业务负载中保持稳定的表现。
一旦这条路径跑通，固定内存将不只是模型层面的一项架构创新，而会成为推理系统乃至芯片底层设计中的一块基石。
（文中图片来自岩芯矩阵，封面图由AI生成）
EdgeRock-4B已在GitHub（github.com/rockmatrix-ai/EdgeRock）与Hugging Face（huggingface.co/rockmatrix-ai/EdgeRock）开源
技术报告见arXiv:2610.10118
END.
Don’t slim down the cache, but make it not grow at all.
The “Token Economics” inside a ring.
Author | Tian Siqi
Editor | Li Zi
The cost equation of AI inference is being rewritten by increasingly longer tasks.
McKinsey predicts that by 2030, inference will account for more than half of AI compute demand. KV Cache is an unavoidable component of this equation, and the industry has been seeking solutions: last month, SGLang teamed up with Qianwen and NVIDIA to launch a 4-bit KV Cache solution, allowing the same GPU memory to hold longer contexts.
Coding Agent makes this accounting more urgent. For a complex programming task, the model must repeatedly read code, tweak tools, modify the program, and then continue working based on test results. The longer the task runs, the more history it has to remember, and the KV cache inflates accordingly, not only consuming VRAM but also reducing the number of requests a single GPU can handle simultaneously.
No matter how much you compress, the cache will still grow with inference, just more slowly; models like Mamba and RWKV that use fixed memory tend to lose critical details needed for problem solving. The Rock Core Matrix takes a different approach: instead of slimming the cache, it prevents it from growing at all; meanwhile, it lets the model learn which details are worth remembering.
This week, Rock Mountain Technology’s subsidiary Yanxin Matrix, together with Hong Kong University of Science and Technology, Carnegie Mellon University and other institutions, released and open‑sourced EdgeRock‑4B. The model is derived from Qwen3.5‑4B, and its core is the team’s proposed Rock Memory Anchors (RMA): just like a climber drives in a rock anchor, it firmly secures key information during inference.
According to the team’s published tests, EdgeRock-4B’s attention KV for each sequence is fixed at 72 MiB, which is 99.1% less than the source model at a 256K context. At the same time, its long‑context inference throughput on the same GPU reaches 6.42× that of the source model, and the average pass rate for AIME 2024–2026 is 82.9%, on par with leading small models whose memory usage grows with inference.
Memory is saved, inference isn’t compromised, and throughput multiplies several times. Having all three simultaneously is exactly what EdgeRock aims to demonstrate.
1. The Era of Long Reasoning, AI Recalculates Memory Accounting
Long contexts consume VRAM, the main issue is the KV Cache that continuously accumulates during inference.For each new token generated, the model must retain the keys and values of all previous tokens for subsequent computations.
Taking Qwen3.5-4B as an example, based on the public configuration, each additional token requires about 32 KiB more for attention KV. With a context length of 64 K, a single sequence consumes roughly 2 GiB; at 256 K, it reaches 8 GiB. This does not yet include model weights and other runtime overhead.
EdgeRock’s KV cache does not grow with context; at a 256K context it is 99.1% smaller than the source model.
Putting it on an 80GB GPU makes the calculation more intuitive. Inference services fill the GPU through batch processing, but the larger the cache per request, the fewer requests can be loaded simultaneously. Often, compute capacity remains, but video memory runs out first, so the number of tokens produced per unit time cannot increase.
Xu Hua, head of the Rock Core Matrix team, said in an interview with “Jiazi Light‑Year” that the industry already has many compression methods, such as Multi‑Head Latent Attention (MLA) and KV‑Cache quantization. They reduce the storage cost per token, but the cache still grows with the context. Slowing the growth merely pushes the memory wall further back.
Another approach is to change the architecture. Recurrent models like Mamba and RWKV write history into a fixed‑size state, so memory no longer grows. Early details can easily be diluted during updates, and tasks such as multi‑step mathematical reasoning or programming tasks that repeatedly call earlier code are consequently affected. The Rock Core matrix evaluated 16 of these bounded‑state models, up to 14 B, and the best scores in AIME 2024–2026 were only 18.8%.
In other words, fixing memory size isn’t hard; the hard part is remembering after it’s fixed.
Rock Core Matrix has previously accumulated related research in this direction and launched a modification experiment for Qwen3.5-4B in July 2026. According to Xu Hua, the choice of Qwen is related to the question the team wants to verify: Qwen3.5-4B itself is a hybrid architecture with strong language, vision, and reasoning capabilities; the team hopes to retain these abilities while only changing the model’s way of handling long-term memory.
What he and his team want to demonstrate is that, a fully trained model can also achieve fixed memory through architectural conversion without sacrificing inference capability. If this approach can be transferred to other mainstream open-source models, the applicability of fixed memory will be greatly expanded.
2. From a cyclic state to active memory,
What EdgeRock transformed
The redesign of EdgeRock focuses on how historical information is stored and read. To that end,the team proposed a World-State: the model no longer keeps an ever‑growing complete history,but maintains a fixed‑size state that is continuously updated as new information arrives.
Specifically, the world state divides history into three parts: the recursive state captures the gist, the local window handles the immediate context, and the anchor library records the key points.The first two parts reuse the industry‑proven Gated DeltaNet and sliding‑window attention; what truly determines what the model remembers is the RMA.
EdgeRock’s fixed memory: recursive state summarizes context, local window retains recent content, RMA anchor library preserves key details
The key to RMA is to let the model actively select information worth retaining. Xu Hua told “Jiazi Light‑Year” that the team built a scoring mechanism through training to judge which content is more useful for subsequent prediction and problem solving. New inputs generate candidate records, which then compete with existing memories for limited slots: the model makes a selection every 256 tokens, and each KV group retains only the top‑scoring 1,024 entries.
The retained anchors preserve the form they had when written, and are not repeatedly re‑summarized as the loop state updates. Even if the original text has long since scrolled out of the local window, the model can still read it directly based on the current question. Each anchor also marks its source location, so you can see what the model remembered directly.
Take robot inspection as an example. As the robot moves along a route, the camera continuously captures a large amount of repetitive footage, but whether an anomaly that occurred on a device has been resolved will directly affect subsequent judgments. What RMA does is retain these records with long‑term value, preventing them from being diluted by constant updates.
This memory capability also directly supports reasoning ability. The team performed a straightforward test: when RMA is completely turned off during inference, the accuracy of long‑context distant queries drops from 94.1% to 0.4%.
Evaluations show that, under fixed memory constraints, EdgeRock-4B still retains strong complex reasoning ability. In the four tests—mathematical reasoning, comprehensive knowledge, scientific reasoning, and code generation—it clearly outperforms much larger fixed‑memory models.
EdgeRock uses only 4B parameters, and its scores on four capabilities all surpass those of larger fixed‑memory models with 7B to 14B parameters
The saved memory is directly turned into service capability. When a single card runs 512 long inference tasks simultaneously (each with 32K input and 32K output),EdgeRock-4B together with the model weights peaks at about 61 GiB of VRAM; running the same 512 sequences, the source model’s KV Cache alone requires roughly 1 TiB, equivalent to 13 80‑GB GPUs.
Running 512 long inferences simultaneously: the source model’s KV cache alone requires about 13 80GB GPUs, while EdgeRock‑4B fits on a single GPU even with weights.
A single card can handle more requests, so throughput naturally increases. On the same GPU, EdgeRock‑4B’s long‑context inference throughput reaches 12,124 tokens per second, 6.42× that of the source model. Within the same GPU rental period, throughput jumps severalfold, and the cost per token drops to a fraction of the original. The decoding speed per request is also 1.54× that of the source model.
On the same GPU, EdgeRock-4B’s long inference throughput is 6.42 times that of the source model (32K input, 32K output, measured in tokens/s)
Xu Hua said that the core value of the 4B version lies in demonstrating that a mature large model can achieve fixed memory through architectural redesign while preserving its original long-range reasoning capability. Going forward, the team will continue to refine these abilities in real-world agents and software engineering scenarios.
From independent memory anchors, to stronger complex reasoning, and then to a multiplied increase in single‑card throughput, what EdgeRock showcases in this open‑source release is the cascading effect of a single architecture. For AI services that need to run a large number of long‑running tasks continuously, the same GPU can handle more long inferences, raising the ceiling of service efficiency.
3. Data Center Inference Cost Reduction,
Next step targets Model on Chip
In Xu Hua’s view, the first place where fixed memory technology will realize commercial value will be data centers.
He summarizes the core demands of the two scenarios as: The edge side values feasibility—it’s a hard requirement of “whether it can run successfully”; data centers value economics—it’s a hard requirement of “whether costs are controllable and profitability can be achieved.”
In embodied scenarios such as robot‑dog inspections and campus deliveries, the model must continuously receive environmental information and make real‑time decisions, while edge compute and memory are already constrained, and modules like camera capture and motion control further compete for resources. Fixed memory sets an upper limit for historical states, allowing these devices to infer stably and continuously.
In data centers, the scale of inference demand is even larger, and the pressure to cut costs is more pronounced. For vendors providing token services, how many long tasks a single card can handle directly determines how much value the existing compute power can generate.
Xu Hua judges that large‑model development is entering a stage that places greater emphasis on return on investment. Today, industry competition still focuses on pushing the limits of performance; but when commercial accounting becomes the main thread, the value of fixed memory will become evident.
This is also why the team wants to expand to larger models. The 4B version has already validated that this architectural transformation route is feasible; to support more complex real-world tasks, the team will continue to fine‑tune on even larger models such as 27B, striving to preserve the native model’s capabilities and operational stability.
From the perspective of Rock Core Matrix, the value of fixed memory is not just about saving money: the saved memory becomes throughput on the GPU and can also become speed on the chip.
Two types of benefits of fixed memory: increased throughput and reduced cost on GPUs; shortened data paths and faster generation on dedicated chips
Therefore, the longer‑term plan is to follow fixed memory all the way toward “speed”. Rock‑core Matrix calls this goal Ultra‑Fast Token: enabling powerful models to continuously generate at a rate of one million tokens per second per user.
This roadmap consists of three steps. The first step is EdgeRock, which prevents KV Cache from growing. The second step is DiffusionRock, bringing fixed memory into a generative architecture beyond autoregression, writing an entire block at once. The third step is Model on Chip, i.e.,SiliconRock.
Three steps toward Ultra-Fast Token, tearing down a wall at each step
Step two has made progress. Today, mainstream large models generate one token after another, and for each token they have to read the weights from GPU memory. DiffusionRock adopts a different approach: first write a draft of 256 tokens at once, then perform several rounds of focused editing, reading the weights only once and updating all 256 positions together.
According to the team, DiffusionRock’s per-request speed has reached 1500 tokens per second, an order of magnitude faster than the typical 100–200 tokens per second seen today; it also uses memory rock anchors to manage history, so memory does not grow.
Both run three rounds, EdgeRock only generated 3 tokens, while DiffusionRock has already completed a whole block of 256 tokens
Model on Chip thus represents a deeper hardware‑software co‑design approach. Xu Hua explained that the capacity of on‑chip SRAM is always a hard constraint in hardware design; however, once the historical states required for model execution stabilize at a fixed size, the design of a dedicated chip has a clear memory budget.
The math behind it is as follows: on a GPU, generating each token requires reading the entire model’s weights from VRAM. For a model with about 2.1 billion parameters, even if the weights are quantized to 4 bits, each token still moves roughly 913 MB; to achieve one million tokens per second would require about 913 TB/s of bandwidth. Nvidia’s latest‑generation Rubin GPU can only read about 22 TB/s from VRAM, which is more than forty times slower in theory.
In other words, as long as the weights still need to be moved, achieving a throughput of millions of tokens per second is impossible. But merely hard‑wiring the weights into the chip is not enough: companies like Taalas have already done this, yet the KV cache still grows with the context, and the longer the context, the more on‑chip SRAM is required. Conversely, if you only change the model without changing the chip, the weights still have to be moved. Changing both sides simultaneously eliminates both sources of data movement.
Changing only one side can only remove half; modify both ends together, and the two transport items will disappear simultaneously.
SiliconRock does exactly that: it turns the weights of a foundation model directly into circuitry, so no bytes need to be moved during generation; the size of the world state is fixed and can be stored entirely in on‑chip SRAM, right next to the compute units for read/write. As a result, the main path no longer requires expensive HBM, making each token cheaper; the entire generation path can be completed on a single chip, which is also faster. A million tokens per second means each token takes only 1 µs, which at a 1 GHz clock is 1,000 cycles; the team’s schedule based on this calculation is 884 cycles, equivalent to about 1.13 million tokens per second.ken.
A token completes its journey in 1 microsecond: the weights are in the circuit, and the state is right next to the compute unit
Xu Hua’s long‑term goal is to embed model capabilities into chips, ultimately achieving generation speeds of a million tokens per second. According to the Rock‑Core matrix vision, by then the speed will unlock entirely new scenarios: When large models generate fast enough, they can keep up with machinesHuman control frequency directly controls the robot, merging the “brain” and “cerebellum” into one.
The brain and cerebellum merged into one: a single large model understands tasks, generates actions, and continuously refines them based on execution feedback
“Jiazi Light‑Year” believes that as the trade‑off between model capability and inference cost becomes increasingly prominent, the value of fixed memory will become more evident. For the EdgeRock team, the next key is to smoothly transfer this mechanism to larger‑parameter models and maintain stable performance across diverse hardware environments and real‑world workloads.
Once this path is successful, fixed memory will not only be an architectural innovation at the model level, but will become a cornerstone in inference systems and even the underlying chip design.
(Images in the article are from Rock Core Matrix, and the cover image was generated by AI)
EdgeRock-4B has been open‑sourced on GitHub (github.com/rockmatrix-ai/EdgeRock) and Hugging Face (huggingface.co/rockmatrix-ai/EdgeRock)
The technical report is available at arXiv:2610.10118
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